MBIST Jobs in California

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CPU DFT Verification Engineer

Apple, Inc.

Santa Clara, California, USA

Full-time

Summary Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies

CPU DFT Verification Engineer

Apple, Inc.

Santa Clara, California, USA

Full-time

Summary Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies

CPU Silicon Timing Correlation Engineer

Apple, Inc.

Cupertino, California, USA

Full-time

Summary Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies

Senior DFT Engineer

Qualcomm Technologies

Santa Clara, California, USA

Full-time

Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: The Digital ASIC Design Team is currently seeking candidates who will be responsible for the implementation and verification of DFT/DFD (Design for Test/Design for Debug) techniques for low power, multi voltage designs. The candidate should have solid hands-on experience with industry standard DFT techniques such as scan and MBIST. Job responsibilities include DFT pattern generati

DFT Contractor

Technical Link

Irvine, California, USA

Contract

Key Responsibilities DFT Architect for IoT SOC DevicesRun ATPG/DFT/MBIST tools at subsystem and Top LevelsAssemble a DFT plan that assists bringup and guarantees quality in manufacturing testUnderstand debug, trace, and other isolation techniquesRun ATPG and other vector generationSupport the design team in debugging and meet low power and other constraintsVerify your work effectivelyJob Requirements BSEE and 8 or more years of DFT design experienceDeep knowledge of Mentor Tessent or equivalent

Sr Staff Hardware Engineer - Memory Diagnostics & Yield

Qualcomm Technologies

San Diego, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > Hardware Engineering General Summary: The Yield and Diagnostics group is responsible for driving post-silicon debug and yield improvement on leading-edge technologies for Qualcomm 5G products in advanced semiconductor process nodes (FinFET, GAA, etc). In this role, you will be a member of a global technical team working with Design, Process, Product, Test, and Failure Analysis teams, as well as EDA Software ve

DFT Engineer

Axiom Global Technologies, Inc.

Santa Clara, California, USA

Third Party, Contract

Role: DFT Engineer Location: Santa Clara, CA 95051 Onsite Duration: 9+ Months Qualification/Experience/Skills Required 10+ years of hands-on experience with DFT and test flow with commercial EDA tools (Synopsys, Mentor) for large and complex SoCs.Strong fundamental knowledge of DFT techniques include JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, Scan compression, I 1500 Std. and MBIST, LBIST. Experience with Synopsys DFT Compiler, Tetramax and VCS is required.Experience

ATE Test Engineer (v9300 & Smartest 7 and 8)

Oxford Global Resources

San Jose, California, USA

Contract

Title: ATE Test Engineer (V9300 & SmarTest 7 or 8 experience) Location: Austin, TX (1st choice) OR San Jose, CA (2nd choice) Length of Contract: 6-12 months Process: 2 interviews. 1 screening 1-on-1s with team members (technical) Ideal Start Date: 4/22 or later Background Check required. Job Description: Exciting new opportunity to lead an excellent team that is working on next generation ATE solutions and semiconductor devices, supporting customers generating High Performance Compute. You'll