1 - 20 of 202 Jobs

RTL ASIC Design Engineer

Innova Solutions, Inc

Mountain View, California, USA

Full-time

Innova Solutions is immediately hiring an RTL ASIC Design Engineer Position type: Full Time Duration: Full Time Location: Mountain View, CA (Onsite) As an RTL ASIC Design Engineer, you will: Minimum Qualifications: RTL ASIC Design lead with some storage backgroundExp with Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Experience in design of DDR / USB /SATA/ PC

Physical Design Engineer with ASIC design Exp.

ApTask

San Jose, California, USA

Full-time

Position: Physical Design Engineer with ASIC design Exp. Location: San Jose, CA (Onsite) Duration: Fulltime Job Description: BS/MS in Electrical Engineering or Computer Science Minimum of hands-on experience in ASIC design and design constraints level synthesis, place and route, timing closure. Standard PnR and signoff tools and their capabilities Understanding of basic power Analysis and power integrity Analysis Excellent English verbal and written communication skills. Self-motivated, abl

ASIC Physical Designers - I

Infobahn Softworld Inc.

US

Contract

Description: LAPTOP WILL BE PROVIDED Education requirement: Minimum high school diploma / GED *MRUNDA is required* Same sponsor for JP25789 and JP25794; duplicates are not accepted Hybrid Work Model - mostly working from home with 1-2days in the office. DO NOT SUBMIT REMOTE ONLY CANDIDATES CW will assist the DE Leads in executing physical design including Performance Verification involving layout verification and reliability checks. Required Skills: Physical design CAD flows and Design verifi

Microelectronics ASIC Design Engineer

Leidos

Arlington, Virginia, USA

Full-time

Description The EW Division of Leidos is looking for a Microelectronics Design Engineer to work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design, develop, simulate, and integrate innovative custom microelectronics in support of warfighter missions. Candidate will have a strong background in Digital Signal Processing (DSP) algorithms and their implementation in MATLAB and FPGAs in support of a fast paced, multi-disciplinary design team. Th

Microelectronics ASIC Design Engineer

Leidos

San Diego, California, USA

Full-time

Description The EW Division of Leidos is looking for a Microelectronics Design Engineer to work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design, develop, simulate, and integrate innovative custom microelectronics in support of warfighter missions. Candidate will have a strong background in Digital Signal Processing (DSP) algorithms and their implementation in MATLAB and FPGAs in support of a fast paced, multi-disciplinary design team. Th

Microelectronics ASIC Design Engineer

Leidos

St. Petersburg, Florida, USA

Full-time

Description The EW Division of Leidos is looking for a Microelectronics Design Engineer to work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design, develop, simulate, and integrate innovative custom microelectronics in support of warfighter missions. Candidate will have a strong background in Digital Signal Processing (DSP) algorithms and their implementation in MATLAB and FPGAs in support of a fast paced, multi-disciplinary design team. Th

Technical Sourcing Manager, ASIC IP

Meta Platforms, Inc. (f/k/a Facebook, Inc.)

Fremont, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following position in Fremont, CA: Technical Sourcing Manager, ASIC IP: Function as the primary technical contact on Metas Sourcing and Operations Engineering team for supplier engagement and represent Meta in industry forums. (ref. code REQ-2404-135718: $259,924/year to $276,870/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and

Senior ASIC / FPGA Design Engineer

CIENA Corporation

Gilbert, Arizona, USA

Full-time

Ciena is committed to our people-first philosophy. Our teams enjoy a culture focused on prioritizing a personalized and flexible work environment that empowers an individual's passions, growth, wellbeing and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact. Not ready to apply? Join ourTalent Communityto get relevant job alerts straight to your inbox. Why Ciena: You will be a member of

ASIC & FPGA Verification Engineer

GeoLogics Corporation

Littleton, Colorado, USA

Contract

Role: ASIC & FPGA Verification Engineer Client: DOD-Aerospace Location: Littleton, CO (Hybrid) Duration: 6-month contract Hourly Rate: up to $120/hr (W2, non-benefited) Position Description: Work with low SWaP, radiation hardened, space rated devices.Devise a unique verification plan for a given design.Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.Develop requirements, test cases, build test benches, ge

Senior ASIC / FPGA Design Engineer

CIENA Corporation

Petaluma, California, USA

Full-time

Ciena is committed to our people-first philosophy. Our teams enjoy a culture focused on prioritizing a personalized and flexible work environment that empowers an individual's passions, growth, wellbeing and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact. Not ready to apply? Join ourTalent Communityto get relevant job alerts straight to your inbox. Why Ciena: You will be a member of

RTL/ASIC Design Engineer

Netwoven

San Jose, California, USA

Contract

KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding Knowledge of PCIe Gen5 and PIPE specification Kno

ASIC Design Engineer - Memory Cache Controller

Apple, Inc.

Austin, Texas, USA

Full-time

Summary Apple is building the world's fastest highly parallel mobile processing systems. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. As we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth.In this role, you will work on crafting special purpose cache and controller which is part and parc

ASIC Design Engineer - Memory Cache Controller

Apple, Inc.

Austin, Texas, USA

Full-time

Summary Apple is building the world's fastest highly parallel mobile processing systems. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. As we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth.In this role, you will work on crafting special purpose cache and controller which is part and parc

ASIC Design Engineer - Memory Cache Controller

Apple, Inc.

Austin, Texas, USA

Full-time

Summary Apple is building the world's fastest highly parallel mobile processing systems. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. As we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth.In this role, you will work on crafting special purpose cache and controller which is part and parc

Touch ASIC Architect (Digital)

Apple, Inc.

San Diego, California, USA

Full-time

Summary Design, develop, and launch next-generation Touch Technologies in Apple products!The Touch Technology team develops ground breaking Touch solutions and technologies that are central to Apple's products, including the iPhone, iPad, MacBooks, and more! The key goal of our team is to enable the world's best multi-touch user-experience. Our team features a collaborative and hands-on environment that fosters engineering excellence, creativity, and innovation. An ASIC Digital Architect within

Touch ASIC Architect (Analog)

Apple, Inc.

San Diego, California, USA

Full-time

Summary Design, develop, and launch next-generation Touch Technologies in Apple products!The Touch Technology team develops ground breaking Touch solutions and technologies that are central to Apple's products, including the iPhone, iPad, MacBooks, and more! The key goal of our team is to enable the world's best multi-touch user-experience. Our team features a collaborative and hands-on environment that fosters engineering excellence, creativity, and innovation. An ASIC Analog Architect within

Touch ASIC Architect (Analog)

Apple, Inc.

Cupertino, California, USA

Full-time

Summary Design, develop, and launch next-generation Touch Technologies in Apple products!The Touch Technology team develops ground breaking Touch solutions and technologies that are central to Apple's products, including the iPhone, iPad, MacBooks, and more! The key goal of our team is to enable the world's best multi-touch user-experience. Our team features a collaborative and hands-on environment that fosters engineering excellence, creativity, and innovation. An ASIC Analog Architect within

ASIC Power Engineer

Apple, Inc.

Cupertino, California, USA

Full-time

Summary Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient / low power design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC/Power architecture and design, VLS

Touch ASIC Architect (Digital)

Apple, Inc.

Austin, Texas, USA

Full-time

Summary Design, develop, and launch next-generation Touch Technologies in Apple products!The Touch Technology team develops ground breaking Touch solutions and technologies that are central to Apple's products, including the iPhone, iPad, MacBooks, and more! The key goal of our team is to enable the world's best multi-touch user-experience. Our team features a collaborative and hands-on environment that fosters engineering excellence, creativity, and innovation. An ASIC Digital Architect within

Touch ASIC Architect (Digital)

Apple, Inc.

Cupertino, California, USA

Full-time

Summary Design, develop, and launch next-generation Touch Technologies in Apple products!The Touch Technology team develops ground breaking Touch solutions and technologies that are central to Apple's products, including the iPhone, iPad, MacBooks, and more! The key goal of our team is to enable the world's best multi-touch user-experience. Our team features a collaborative and hands-on environment that fosters engineering excellence, creativity, and innovation. An ASIC Digital Architect within