1 - 20 of 20 Jobs

Senior RTL Design Engineer

ZealTech, Inc.

San Jose, California, USA

Contract

RTL Design Engineer - Senior Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation. EDUCATION: Bachelor's or Master's in Computer Engineering KEY RESPONSIBILITIES: Perform RTL design of digital components in Verilog/system

RTL Designer, Austin, Texas

Stellent IT LLC

Austin, Texas, USA

Full-time

RTL Designer Austin, Texas Fulltime Job Description UCIe AKA die-to-die (hard to find these) Ethernet (candidate focusing on this) Coherent Fabric (cache OR "coherent interconnect" OR "coherent fabric" OR coherent OR coherency) AND (AMBA OR APB OR AXI OR NOC OR "network on chip" OR "network-on-chip") AND (semiconductor OR conductor OR controller OR microprocessor OR processor OR conductor OR microcontroller OR soc OR "system on chip" OR "full chip") Debug and trace RISC/ARM needs Best Regards

SOC Design Verification - Austin, TX(Onsite)

Canvendor Inc

Austin, Texas, USA

Third Party, Contract

We do have a SOC Design Verification role in Austin, TX(Onsite). Please find the Job Description below and kindly respond back with your updated resume. Job Title: SOC Design Verification Job Location: Austin, TX(Onsite) Duration: 12+ Months Job Description: 6+ years of experience in Design VerificationStrong experience in SOC level with knowledge of System Verilog, UVMGood knowledge of test plan creation and trackingExperience with full verification flow including coverage closure.Low-level pro

FPGA Electrical Engineer - G

Next Step Systems

Linthicum Heights, Maryland, USA

Full-time

FPGA Electrical Engineer, Linthicum Heights, MD We are looking for multiple candidates at multiple levels for this position. All candidates must be fully vaccinated with an FDA authorized and/or approved COVID-19 vaccine as a condition of employment. Requests for reasonable accommodation for medical, religious, or other reasons will be considered in accordance with applicable law. These positions are 100% Onsite. FPGA Electrical Engineer Responsibilities: - Participate in all phases of FPGA de

Senior FPGA Electrical Engineer - G

Next Step Systems

Linthicum Heights, Maryland, USA

Full-time

Senior FPGA Electrical Engineer, Linthicum Heights, MD We are looking for multiple candidates at multiple levels for this position. All candidates must be fully vaccinated with an FDA authorized and/or approved COVID-19 vaccine as a condition of employment. Requests for reasonable accommodation for medical, religious, or other reasons will be considered in accordance with applicable law. These positions are 100% Onsite. Senior FPGA Electrical Engineer Responsibilities: - Participate in all pha

RTL Design Engineer - Hybrid

VIVA USA INC

Santa Clara, California, USA

Contract

Title: RTL Design Engineer - Hybrid Description: Looking for RTL design integration Engineer. JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation. EDUCATION: Bachelor's or Master's in Computer Engineering KE

ASIC Design Engineer - Neural Engine DMA

Apple, Inc.

Cupertino, California, USA

Full-time

Summary Do you love crafting elegant solutions to highly sophisticated challenges? As part of our Hardware Technologies group, you'll help design our next-generation, high-performance, power-efficient system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, we will enable our c

ASIC Design Engineer - Neural Engine DMA

Apple, Inc.

Cupertino, California, USA

Full-time

Summary Do you love crafting elegant solutions to highly sophisticated challenges? As part of our Hardware Technologies group, you'll help design our next-generation, high-performance, power-efficient system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, we will enable our c

Principal Digital Design Engineer, SoC

Island Staffing

San Jose, California, USA

Full-time

As a Principal Engineer/Manager, Digital Design SoC, you will be leading with a small team of design engineers to develop novel SoC products for connectivity and communications. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. You will support other discipline teams to bring the SoC device to successful mass production. This full-time position is based in San Jose, CA. Key Responsibilities Review and co

Sr. Staff Design Engineer (Low Power)

Qualcomm Technologies

Santa Clara, California, USA

Full-time

Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a key member of a fast paced Integrated Wireless Technology team you will be working on WiFi (802.11x) technology, SOC Design, Low Power micro-ar

Sr. RTL Design Engineer

Infobahn Softworld Inc.

Santa Clara, California, USA

Third Party, Contract

Location: San Jose, CA - Hybrid (at least 3 days a week) KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project's schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL

Sr. Coherent Designer

Xoriant Corporation

Austin, Texas, USA

Contract

Job Title: Sr. Coherent Designer Location: Austin Texas Duration: 6+ Months (possible extension + long term project) Description As a senior designer on coherent interconnect micro-architect, you will be responsible for working on the micro-architecture development of custom coherent interconnect IP and/or last level cache blocks.In this role you will be interacting with the system architects, verification, performance/power and design implementation teams.You will be owning and driving the crit

Digital Design Engineer

Qualcomm Technologies

San Diego, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (bl

RTL Design Engineer - Senior - Hybrid

VIVA USA INC

Santa Clara, California, USA

Contract

Title: RTL Design Engineer - Senior Description: KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding K

GPU Power Engineer

Qualcomm Technologies

San Diego, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm GPU Engineer, you may architect, design, implement, verify, and/or optimize the performance and power of GPU cores. Qualcomm Engineers collaborate with

RTL Design Engineer

Xoriant Corporation

San Jose, California, USA

Contract

Title: RTL Engineer Location: San Jose, CA | San Diego, CA | Austin Texas Duration: 6+ months (Possible Extension-Long Term Project) Job Description As a senior RTL design engineer, you will work as part of a memory controller IP design team.You will be tasked with driving the RTL design, performance and power optimization of various sub-blocks of the dynamic memory controller.Solid engineer foundation and RTL design experience is desired for success.Key responsibilities include: Produce quality

RTL Design Engineer

SGS Consulting

Santa Clara, California, USA

Contract

JOB DESCRIPTION: JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation.EDUCATION: Bachelor's or master s in computer engineeringKEY RESPONSIBILITIES: Perform RTL design of digital components in Verilog/system

RTL/ASIC Design Engineer

Netwoven

San Jose, California, USA

Contract

KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding Knowledge of PCIe Gen5 and PIPE specification Kno

ASIC Design Engineer

BlackFern Recruitment

Milpitas, California, USA

Full-time

Job Description Front-End ASIC Design Engineer - Milpitas, CA Our client develops and delivers ASIC and SoC solutions to customers worldwide in some of the hottest technology areas. The Front-End ASIC Design Engineer will be a key person in this growing design department. Micro-architecture experience is required. Great opportunity to work on current, ongoing and upcoming new projects. Hybrid remote/onsite position. Primary responsibilities include: Support customer s design through all phases o

Senior Design Verification Engineer

Capgemini Engineering

Austin, Texas, USA

Full-time

Senior Design Verification Engineer Austin TX (Hybrid role) Life at Capgemini Capgemini supports all aspects of your well-being throughout the changing stages of your life and career. For eligible employees, we offer: Flexible work Healthcare including dental, vision, mental health, and well-being programsFinancial well-being programs such as 401(k) and Employee Share Ownership PlanPaid time off and paid holidays Paid parental leaveFamily building benefits like adoption assistance, surrogacy,