The factor limiting the computing power of a microprocessor is no longer the number of circuits that can be crammed onto a single chip, according to researchers whose work with carbon nanotubes might unintentionally help solve the circuit-density problem.
The real limiting factors are heat and power, both of which can overwhelm processors long before they run out of space for more circuits, according to Mark. C. Hersam, the carbon-nanotube-transistor-researching professor of materials science and engineering, chemistry and medicine at Northwestern University.
“It is generally accepted that power consumption is the key limiting factor to achieving further increases in the complexity in integrated circuits,” Hersam said in the announcement of a paper he co-authored in the American Chemical Society’s Nano Letters.
“A modern-day integrated circuit has more than 1 billion transistor” he added. ” Consequently, the power dissipation per transistor needs to be very low in order for the entire circuit to have a reasonable power consumption.”
In the paper, Hersam and co-author Michael L. Geier of the University of Minnesota describe a way to combine the low power demand of traditional complementary metal–oxide–semiconductor (CMOS) circuits with circuits made of carbon nanotubes that don’t so much demand power as whisper quietly for a sip of it before going back to work.
The resulting logic circuit consumes 0.1 nanowatts of electricity while turned either “on” or “off” – three orders of magnitude less power than any other reported nanotube-based CMOS circuit, all of which are able to utilize far less power than typical CMOS circuits due to their use of carbon nanotubes rather than copper and other traditional materials.
CMOS-based circuits use less power than most other designs because one of each pair of transistors represents its bit of data by being turned either on or off; TTL, NMOS and other designs require some power use even at rest, making them less attractive for processors containing tens of thousands or millions of logic circuits.
The number of CMOS circuits that can be packed onto a chip, however, is limited by the voltage settings required to change the settings on one circuit, Hersam said.
With too many CMOS circuits, voltage levels intended to turn the p-type transistors from on to off, might also change the states of n-type transistors. The ability of processor makers including Intel has not advanced to the point that the resulting chips make mistakes by flipping the wrong set of transistors, but that point isn’t far in the future, Hersam added.
In their paper, Hersam and Geier describe a way to use metal gates to clearly separate the levels of voltage needed to address both p- and n-type transistors built with carbon nanotubes, shrinking the circuits, demand for power and potential for confusion all at the same time.
The next step is to combine nanotube-based circuits into more complex circuits with more transistors and logic gates, each of which rely on less than a nanowatt of power – which would make them approximately a million times more power-efficient than current versions.