Oracle used Oracle Open World (OOW) to unveil an enhanced Solaris 11.1 with support for software-defined networks and other cloud features. But that didn’t entirely overshadow the fact that the Sparc T5 chip Oracle announced at this year’s Hot Chips conference seems likely pushed to 2013.
Solaris 10.1 apparently offers over 300 new performance and feature enhancements to the Oracle Solaris 11 product family. The key additions, Oracle claimed, are support for FedFS as well as expanded support for SDNs. The new OS version supports up to 32 terabytes of RAM.
Additional features include the ability to decrease Oracle Real Application Clusters lock latency by 17 percent by offloading lock management into the Oracle Solaris kernel. The new OS can also resize the Oracle Database SGA without the need for a reboot.
Solaris powers Oracle’s SPARC T-Series server line, the Oracle SPARC SuperCluster T4-4, Oracle Exadata Database Machine and the Oracle Exalogic Elastic Cloud.
“Oracle Solaris 11 is the best UNIX operating system to run Oracle applications, deploy mission critical cloud infrastructure and protect customer investments,” said John Fowler, executive vice president, Systems, Oracle.
But Fowler also skipped over some bad news: an apparent delay for the Sparc T5. A year ago, Oracle’s Sun division announced the Sparc T4—and according to Fowler, Oracle chief Larry Ellison set a very high bar for the next iteration: double the performance while maintaining app compatibility on an annual basis. Apparently, that didn’t quite happen with the T5; Oracle had the opportunity to announce a T5-based server, and didn’t.
That’s a bit of bad news for the Sun design team, which already had to watch Intel’s Xeon chief, Diane Bryant, give the preceding keynote. The “industry-standard” X86 architecture is the foundation of many of Oracle’s machines, but the Sparc-based T-series is a higher-margin product: “the hottest UNIX box in the industry,” according to Oracle co-president Mark Hurd.
As detailed at this year’s Hot Chips conference, the T5 combines 16 CPU cores running at 3.6 GHz on a 28-nm manufacturing process. Continuing the trend of hardware acceleration of specific functions, Sun executives claimed the chip would lead in on-chip encryption acceleration, with support for asymmetric (public key) encryption, symmetric encryption, hashing up to SHA-512, plus a hardware random number generator.
But with Fowler’s roadmap for the chip listing its appearance as sometime in 2013, it’s now a game of wait-and-see.